Senior Verification Engineer

? Barcelona | ? Full-time | ? Visa sponsorship available

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About the Role

A leading engineering team is seeking a Senior Verification Engineer with a strong passion for microprocessor architecture. This role plays a key part in validating complex digital designs at the Register Transfer Level (RTL), ensuring functionality and correctness against specifications. The engineer will work with state-of-the-art methodologies and tools to drive advanced verification processes and guarantee high-quality designs.

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What’s Offered

• Flexible working hours and a hybrid setup
  
• Competitive compensation package
  
• A collaborative and knowledge-driven environment with real growth opportunities
  
• Perks such as free coffee, snacks, and Spanish lessons
  
• Visa sponsorship support, if required
  
• A vibrant lifestyle in the heart of Barcelona
  

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Requirements

• Master’s or PhD in a relevant discipline
  
• 8+ years of professional experience in verification engineering
  
• Strong command of SystemVerilog and UVM
  
• Proficiency with scripting languages (Python, Perl, Bash, Tcl) and regression automation
  
• Experience with simulation methodologies and tools
  
• Familiarity with revision control tools (git, svn)
  
• Hands-on experience in block-level, subsystem, or top-level verification
  
• Knowledge of both formal and dynamic verification techniques
  
• Excellent problem-solving abilities, attention to detail, and teamwork skills
  
• Professional English proficiency (C1 or above)